Product

The ZMAN family of modules is first and foremost designed to provide a high performance media transport that is tightly synchronized (ultra-low jitter and wander), deterministic, and low latency for Networked I/O end-points. What sets them apart from other offerings is the additional processing capabilities that are built-in, with 2 x ARM CPUs and serious FPGA real-estate.
Merging is strongly committed to foster the adoption of AES67 networking capability by making available, as a simple to integrate module (pin-compatible to Dante Brooklyn II), all required functionalities for OEMs to take advantage of this rapidly evolving market.
If you are interested and want more infomation, just contact us.

• High resolution sample rates up to 384kHz PCM, DXD and DSD256
• Up to 64 RAVENNA/AES67 streams, 256 audio channels
• AES3 I/O up to 192kHz
• Channel based audio routing (512 x 512 Matrix)
• Ultra-low latency on-chip mixing engine (128 inputs x 32 outputs)
• 28 freely assignable EQ bands
• On-board ultra-low jitter and ultra-low phase noise clock
• Fully compatible RAVENNA/AES67 protocols over Gigabit Ethernet
• Web-based network remote control

• Compact Mezzanine board, small form factor 59.6 x 44.5 mm
• Ultra-low phase noise clock
• PTPv2 Master or Slave, IEEE-1588-2008 standard
• Support for industry standard SMPTE 2110
• Automatic device network discovery (Bonjour)
• Channel based internal routing
• Built-in ARM processors + abundant FPGA-based DSP in a single chip
• Compatible with any RAVENNA/AES67 device on network
• SDK and API for easy integration
• Use case examples through configuration scripts
• Simple firmware update via network
• Optimized compatibility with Merging Technologies products portfolio

• Windows® driver with ASIO and WDM support
• macOS Core Audio driver support
• Linux ALSA drivers support
• ANEMAN (Audio Network Manager) full support
• PEERING support from the Anubis Interface

• Sample Rate 44.1kHz/48kHz, 88.2kHz/96kHz, 176.4kHz/192kHz
• Optional high resolution support for DXD, 384kHz, DSD64, DSD128 and DSD256
• Word lengths 16, 24, or 32 bits per sample
• I2S/TDM Audio format
• Network input audio buffer up to 16k samples
• Up to 64 RAVENNA/AES67 streams, 256 audio channels
• Word clock IO for synchronization

• Single Power supply 3.3V, under 5W
• Xilinx SoC Zynq based design
• Dual core ARM Cortex A9 processors, ARMv7-A architecture
• DDR3 Memory (512 MB)
• NOR Flash (128 MB)
• Standardized RGMII interface for Gigabit Ethernet switches or PHY, IEEE Std 802.3
• Mezzanine connectors (3 x 80 pins)
• Pin compatible to Dante Brooklyn II (Mini-PCI)

• 1x I2S in 1x I2S out (Master/Slave) with 8 data lines each
• 1 x I2C Master
• 1 x SPI Slave and 1 x SPI Master
• 1 x RGMII
• 1 x UART (up to 921’600 bauds)
• GPIO
• Differential clock input to support
• OCXO, Atomic clock or GPS
• disciplined oscillator

• 64 x 64 I/O@1FS
• 80 DSP slices (FPGA)

• 256 x 256 I/O@1FS
• 220 DSP slices (FPGA)

• Single power supply
• Easy mezzanine prototyping
• Fully exposed GPIO and audio I/O
• On board Gigabit Ethernet switch and PHY
• Dual Ethernet copper ports & SFP Fiber port
• 1 stereo AES-EBU input and 1 stereo AES-EBU output
• Debug console available on standard micro USB port
• Out of the box DAC-like Web remote UI